
/* Include Files -------------------------------------------------------------------------------  */
#include "stm32f10x.h"
#include "driver.h"

/*  Macro Defines ------------------------------------------------------------------------------- */


/* Global Function Prototypes ------------------------------------------------------------------ */
int Drv_initDeviceHardware(void);
void watchdog_reset(void);

/* Private Function Prototypes ----------------------------------------------------------------- */
static void Drv_configDeviceClock(void);
static void Drv_configDevicePins(void);
static void Drv_configDeviceInterrupts(void);

/* Global Variables ---------------------------------------------------------------------------- */


/* Static Variables ---------------------------------------------------------------------------- */

/*************************************************************************************************
 * Procedure: Drv_initDeviceHardware
 * Object:
 * Parameters In:
 * - none
 * Parameters Out:
 * - none
 *************************************************************************************************/
int Drv_initDeviceHardware()
{
    Drv_configDeviceClock();
    Drv_configDevicePins();

    Sytm_initModule();
    //Siic_initModule();
    return 1;
}

/*************************************************************************************************
 * Procedure: Drv_configDeviceClock
 * Object:
 * Parameters In:
 * - none
 * Parameters Out:
 * - none
 *************************************************************************************************/
static void Drv_configDeviceClock()
{
    RCC_HCLKConfig(RCC_SYSCLK_Div1);

    RCC_ADCCLKConfig(RCC_PCLK2_Div8);

    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1 | RCC_AHBPeriph_DMA2
                          | RCC_AHBPeriph_SRAM | RCC_AHBPeriph_FLITF
                          | RCC_AHBPeriph_CRC, ENABLE);

    RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR    | RCC_APB1Periph_CAN1
                           | RCC_APB1Periph_USART2 | RCC_APB1Periph_USART3 | RCC_APB1Periph_UART4 | RCC_APB1Periph_UART5, ENABLE);

    RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_AFIO
                           | RCC_APB2Periph_GPIOA  | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE
                           | RCC_APB2Periph_SPI1
                           | RCC_APB2Periph_ADC1, ENABLE);

    PWR_BackupAccessCmd(ENABLE);
    RCC_LSEConfig(RCC_LSE_OFF);
    BKP_TamperPinCmd(DISABLE);
    PWR_BackupAccessCmd(DISABLE);
}

/*************************************************************************************************
 * Procedure: Drv_configDevicePins
 * Object:
 * Parameters In:
 * - none
 * Parameters Out:
 * - none
 *************************************************************************************************/
static void Drv_configDevicePins()
{
    GPIO_InitTypeDef GPIO_InitStructure;

    /* JTAG-DP Disabled and SW-DP Enabled */
    //GPIO_PinRemapConfig(GPIO_Remap_SWJ_Disable, ENABLE);
    //GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);

    /* Configure I2C1 pins: PB6->SCL and PB7->SDA */
    GPIO_InitStructure.GPIO_Pin =  GPIO_Pin_6 | GPIO_Pin_7;
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;   
    GPIO_Init(GPIOB, &GPIO_InitStructure);
}

/*************************************************************************************************
 * Procedure: Drv_configDeviceInterrupts
 * Object:
 * Parameters In:
 * - none
 * Parameters Out:
 * - none
 *************************************************************************************************/
static void Drv_configDeviceInterrupts()
{
    NVIC_InitTypeDef NVIC_InitStructure;

//    NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
//    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
//    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
//    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
//    NVIC_Init(&NVIC_InitStructure);

//    NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
//    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
//    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
//    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
//    NVIC_Init(&NVIC_InitStructure);

//    NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
//    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
//    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
//    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

//    NVIC_InitStructure.NVIC_IRQChannel = UART4_IRQn;
//    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
//    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
//    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
//    NVIC_Init(&NVIC_InitStructure);

//    NVIC_InitStructure.NVIC_IRQChannel = UART5_IRQn;
//    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
//    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 4;
//    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
//    NVIC_Init(&NVIC_InitStructure);
}

/**
  * @brief  watchdog_reset.
  * @param  None
  * @retval None
  */
void watchdog_reset()
{
    IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);
    IWDG_SetPrescaler(IWDG_Prescaler_32);
    IWDG_SetReload(50);
    IWDG_Enable();
//  while(1);
}

